| 
 Definiciones | 
| #define  | DMA_DMA16_INFO() | 
| #define  | DMAx_REG_STATUS   0x08 | 
| #define  | DMAx_REG_COMMAND   0x08 | 
| #define  | DMAx_REG_REQUEST   0x09 | 
| #define  | DMAx_REG_SMASK   0x0A | 
| #define  | DMAx_REG_MMASK   0x0F | 
| #define  | DMAx_REG_CLEARB   0x0C | 
| #define  | DMAx_REG_MODE   0x0B | 
| #define  | DMAx_REG_ADDR   (channel << 1) | 
| #define  | DMAx_REG_COUNT   ( DMAx_REG_ADDR + 1 ) | 
| #define  | DMA_REG(reg)   (dma16_C0h | ((reg) << dma16_01h)) | 
| #define  | DMA_REG_STATUS   DMA_REG(DMAx_REG_STATUS) | 
| #define  | DMA_REG_COMMAND   DMA_REG(DMAx_REG_COMMAND) | 
| #define  | DMA_REG_REQUEST   DMA_REG(DMAx_REG_REQUEST) | 
| #define  | DMA_REG_SMASK   DMA_REG(DMAx_REG_SMASK) | 
| #define  | DMA_REG_MMASK   DMA_REG(DMAx_REG_MMASK) | 
| #define  | DMA_REG_CLEARB   DMA_REG(DMAx_REG_CLEARB) | 
| #define  | DMA_REG_MODE   DMA_REG(DMAx_REG_MODE) | 
| #define  | DMA_REG_ADDR   DMA_REG(DMAx_REG_ADDR) | 
| #define  | DMA_REG_COUNT   DMA_REG(DMAx_REG_COUNT) | 
| #define  | DMA8_REG_PAGE0   0x87 | 
| #define  | DMA8_REG_PAGE1   0x83 | 
| #define  | DMA8_REG_PAGE2   0x81 | 
| #define  | DMA8_REG_PAGE3   0x82 | 
| #define  | DMA8_REG_PAGE | 
| #define  | DMA16_REG_PAGE0   0x88 | 
| #define  | DMA16_REG_PAGE1   0x8B | 
| #define  | DMA16_REG_PAGE2   0x89 | 
| #define  | DMA16_REG_PAGE3   0x8A | 
| #define  | DMA16_REG_PAGE | 
| #define  | DMA_REG_PAGE   (dma16_01h?DMA16_REG_PAGE:DMA8_REG_PAGE) | 
| #define  | DMA_MASK_ON   ((channel) | 0x04) | 
| #define  | DMA_MASK_OFF   (channel) | 
| #define  | DMA_MULTI_MASK(s0, s1, s2, s3)   ((s0)?0x01:0x00)|((s1)?0x02:0x00)|((s2)?0x04:0x00)|((s3)?0x08:0x00) | 
| #define  | DMA_XFER_DEMAND   0x00 | 
| #define  | DMA_XFER_SINGLE   0x40 | 
| #define  | DMA_XFER_BLOCK   0x80 | 
| #define  | DMA_XFER_CASCADE   0xC0 | 
| #define  | DMA_MODE(xfermode, increment, autoinit, write) | 
| #define  | DMA_ADDR_PAGE(lmem)   ((UINT8)((lmem)>>16) & (~dma16_01h)) | 
| #define  | DMA_ADDR_LSB(lmem)   (UINT8)(((UINT16)(lmem)) >> dma16_01h) | 
| #define  | DMA_ADDR_MSB(lmem)   (UINT8)((UINT32)(lmem) >> (8 + dma16_01h)) | 
| #define  | DMA_COUNT_LSB(count_l1)   (UINT8)(count_l1) | 
| #define  | DMA_COUNT_MSB(count_l1)   (UINT8)(((UINT16)(count_l1)) >> 8) | 
| #define  | DMA_SREQ   (0x04 | (channel)) | 
| #define  | DMA_GET_STATUS_TC(b)   ( (b) & (0x01 << (channel)) ) | 
| #define  | DMA_GET_STATUS_REQ(b)   ( (b) & (0x10 << (channel)) ) | 
| #define  | DMA_COUNT_L1(msb, lsb)   ((((UINT16)(msb))<<8) | ((UINT16)(lsb))) | 
| #define  | DMA_ADDRESS(page, msb, lsb)   ((((UINT32)page)<<16)|((UINT32)((((UINT16)(msb))<<8)|(lsb))<<(dma16_01h))) | 
 Funciones | 
| VOID  | dma_resetb (VOID) | 
| VOID  | dma_set (UINT8 channel, BOOL decrement, BOOL autoinit, BOOL writetomem, UINT32 lmem, UINT16 count_l1, BOOL enable_dma) | 
| VOID  | dma_set_mode (UINT8 channel, BOOL decrement, BOOL autoinit, BOOL writetomem, BOOL enable_dma) | 
| VOID  | dma_set_buff (UINT8 channel, UINT32 lmem, UINT16 count_l1, BOOL enable_dma) | 
| VOID  | dma_set_buff_addr (UINT8 channel, UINT32 lmem, BOOL enable_dma) | 
| VOID  | dma_set_buff_count (UINT8 channel, UINT16 count_l1, BOOL enable_dma) | 
| VOID  | dma_disable (UINT8 channel) | 
| VOID  | dma_enable (UINT8 channel) | 
| VOID  | dma_sreq (UINT8 channel) | 
| UINT16  | dma_get_count_l1 (UINT8 channel) | 
| UINT32  | dma_get_addr (UINT8 channel) | 
| UINT8  | dma_get_status (VOID) | 
| BOOL  | dma_get_dmareq (UINT8 channel) | 
| BOOL  | dma_get_status_dmareq (UINT8 status, UINT8 channel) | 
| BOOL  | dma_get_tc (UINT8 channel) | 
| BOOL  | dma_get_status_tc (UINT8 status, UINT8 channel) |